1. Field of the Invention
The present invention relates to a system interruption apparatus for sending an interruption signal to a main processor to suspend the execution of an operation.
2. Description of the Related Art
In personal computers, etc., an interruption signal is sent to a main central processing unit (referred hereinafter as CPU) when system interruption is required. The system is constructed so that the interruption signal is generated, for example, when a user makes use of a resume function provided for the system.
When receiving said interruption signal, execution of an operation is suspended until a release signal is received, and upon receiving the release signal, the execution of the operation resumes.
In a conventional system, however, there is a problem that the desired interruption does not occur while the main CPU is disabled for the interruption signal. This state occurs, for example, when the executed application program has masked that interruption signal. During this state, the resume function cannot be used even though the user attempts to use the function.